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Advances in High Performance Computing by Ashutosh Tiwary, Janusz Kowalik, Bob Abarbanel, John Lixvar,

By Ashutosh Tiwary, Janusz Kowalik, Bob Abarbanel, John Lixvar, Vish Jumani (auth.), Lucio Grandinetti, Janusz Kowalik, Marian Vajtersic (eds.)

Most of the papers during this quantity have been offered on the NATO complex examine Workshop excessive functionality Computing: know-how and alertness, held in Cetraro, Italy from 24 to 26 of June, 1996. the most function of the Workshop used to be to debate a few key clinical and technological advancements in excessive functionality computing, determine major developments and defme fascinating examine targets. the quantity constitution corresponds, generally, to the description of the workshop technical schedule: basic thoughts and rising platforms, software program expertise, algorithms and purposes. one of many Workshop strategies was once an attempt to increase a bit the scope of the assembly from scientific/engineering computing to enterprise-wide computing. The papers on functionality and scalability of database servers, and Oracle DBMS mirror this try we are hoping that once examining this number of papers the readers could have a good suggestion approximately a few vital study and technological matters in excessive functionality computing. we want to provide our due to the NATO clinical and Environmental Affairs department for being the central sponsor for the Workshop. additionally we're happy to recognize different associations and corporations that supported the Workshop: ecu Union: eu fee DGIII-Industry, CNR: nationwide examine Council of Italy, collage of Calabria, Alenia Spazio, Centro Italiano Ricerche Aerospaziali, ENEA: Italian nationwide employer for brand spanking new know-how, strength and the surroundings, Fujitsu, Hewlett Packard-Convex, Hitachi, NEC, Oracle, and Silicon Graphics-Cray learn. Editors January 1997 vii checklist OF individuals Ecole Nonnale Su¢rieure de Lyon, 69364 Abarbanel. Robert M.

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Studies of the scalability of Oracle on the KSR [1] show that machine was quite scalable for database workloads. The machine showed 75% effective throughput for a 32 processor KSR-l with a TPC-B OLTP workload. This study also shows that most NUMA implementations would be less scalable than an equivalent COMA implementation. It is important to note that COMA machines require more hardware to support the large caches and cache-coherence. A new Simple COMA scheme[23] has been proposed that allows COMA support without extensive additional hardware.

W. Meuer and E. Strohmaier, Top500 Supercomputer Sites. Technical Report 33, 34, 38, 40" 41, 42, University of Mannheim, Germany, June 1993, November 1993, June 1994, November 1994, June 1995, November 1995 [2] J. J. Dongarra, H. W. Meuer and E. Strohmaier, eds. TOP500 Report 1993, University of Mannheim, 1994 [3] J. J. Dongarra, H. W. Meuer and E. Strohmaier, eds. TOP500 Report 1994, SUPERCOMPUTER 60/61, volume 11, number 2/3, June 1995 [4] J. J. Dongarra, H. W. Meuer and E. Strohmaier, eds. TOP500 Report 1995, SUPERCOMPUTER 63, volume 12, number 1, January 1996 [5] J.

The network interface takes messages from the II, PI, and MD and sends them out on the Craylink network. It also receives incoming messages for the MD, PI, II, and local Hub registers from the Craylink network. Software programmable routing tables are provided in the NI to support the pipelined routing used by the SPIDER chip[3]. Finally, the memory/directory section contains logic to interface to external data and directory memory implemented with synchronous DRAMs (SDRAMs). The MD perfonns the directory portion of the cache coherence protocol via its protocol table and generates the appropriate requests and/or replies for all incoming messages.

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